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Concurrent-Structural Modeling

Concurrent-structural Modeling (aka Structural Modeling) is an approach in which a hardware system is specified by describing its structure. That is to say, the user instantiates components that roughly correspond to hardware blocks and then interconnects the communication channels defined by the blocks. These blocks then execute according to some Model of Concurrency or Model of Computation (MoC).

Structural Modeling does not imply that the input be graphical. All that is required is that a set of concurrently executing components, that roughly correspond to hardware blocks, are connected together via communication channels. The communicating blocks and the communication channels themselves must remain fixed once specified. For example, the following Liberty Structural Specification (a description for the Liberty Simulation Environment) is a structural description of a simple model of a hardware block that generates data connected to a block that consumes it:

 using corelib;

instance gen:source;
instance hole:sink;

gen.out -> hole.in; 

Below is a visualization of the description showing the structure.
Examples of other structural systems includes VHDL, Verilog, and SystemC.