The Partial Reverse If-Conversion Framework for Balancing
Control Flow and Predication [abstract]
David I. August, Wen-mei W. Hwu, and Scott A. Mahlke
International Journal of Parallel Programming (IJPP), Volume 27, Number 5, October 1999.
Invited.
Special issue composed of "outstanding papers"
selected by the Program Committee of the 30th Annual ACM/IEEE
International Symposium on Microarchitecture.
Predicated execution is a promising architectural feature
for exploiting instruction-level parallelism in the presence of
control flow. Compiling for predicated execution involves converting
program control flow into conditional, or predicated, instructions.
This process is known as if-conversion. In order to apply
if-conversion effectively, one must address two major issues: what
should be if-converted and when the if-conversion should be
performed. A compiler's use of predication as a representation is most
effective when large amounts of code are if-converted and when
if-conversion is performed early in the compilation procedure. On the
other hand, efficient execution of code generated for a processor with
predicated execution requires a delicate balance between control flow
and predication. The appropriate balance is tightly coupled with
scheduling decisions and detailed processor characteristics. This
paper presents a compilation framework based on partial reverse
if-conversion that allows the compiler to maximize the benefits
of predication as a compiler representation while delaying the final
balancing of control flow and predication to schedule time.