An Architecture Framework for Introducing Predicated Execution into Embedded Microprocessors [abstract] (ACM DL, PDF, PostScript)
Daniel A. Connors, Jean-Michel Puiatti, David I. August, Kevin M. Crozier, and Wen-mei W. Hwu
Proceedings of the Fifth European Conference on Parallel Processing (EUROPAR), September 1999.

Growing demand for high performance in embedded systems is creating new opportunities for Instruction-Level Parallelism (ILP) techniques that are traditionally used in high performance systems. Predicated execution, an important ILP technique, can be used to improve branch handling, reduce frequently mispredicted branches, and expose multiple execution paths to hardware resources. However, there is a major tradeoff in the design of the instruction set, the addition of a predicate operand for all instructions. We propose a new architecture framework for introducing predicated execution to embedded designs. Experimental results show a 10% performance improvement and a code reduction of 25% over a traditionally predicated architecture.