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Runtime Empirical Selection of Loop Schedulers on Hyperthreaded SMPs [abstract] (IEEE Xplore, PDF)
Yun Zhang and Micheal Voss
Proceedings of the 19th IEEE International Parallel and Distributed Processing Symposium (IPDPS), April 2005.

Hyperthreaded (HT) and simultaneous multithreaded (SMT) processors are now available in commodity worksta- tions and servers. This technology is designed to increase throughput by executing multiple concurrent threads on a single physical processor. These multiple threads share the processor's functional units and on-chip memory hierarchy in an attempt to make better use of idle resources. Most OpenMP applications have been written assuming an Sym- metric Multiprocessor (SMP), not an SMT, model. Threads executing on the same physical processor have interactions on data locality and resource sharing that do not occur on traditional SMPs. This work focuses on tuning the behavior of OpenMP applications executing on SMPs with SMT pro- cessors. We propose two adaptive loop schedulers that de- termine effective hierarchical schedulers for individual par- allel loops. We compare the performance of our two pro- posed schedulers against several standard schedulers and the per-region adaptive scheduler proposed by Zhang et al. using the SPEC and NAS OpenMP benchmark suites. We show that both of our proposed schedulers outperform all other schedulers on average, and increase speedup on av- erage by over 25% when all thread contexts are used.